iSPAN® 3632 AdvancedMC™ Quad-Port Channelized OC-3/STM-1 TDM to IP Interface Processor

Breakthrough features and channel density TDM-IP processing for next-generation media gateways, base station controllers and radio network controllers

Features:

• Four Channelized OC-3/STM-1 or one OC-12/STM-4 interfaces - SONET / SDH framing
• TDM channelization - 336 T1s / 252 E1s using VT1.5/TU-11 or VT2/TU12 - 8064 DS0 time slots
• Interphase Interworking software for Control Plane & User Plane applications
  - HDLC to IP (for SS7, Frame Relay, LAP-D, etc)
  - TDM Traffic to I-TDM (Future Evolution)
• Designed for ATCA(R) and µTCA(TM) platforms
• Single width, Mid-Size PICMG(TM) AMC.0 R2.0 compliant
• Front Access, with support of SFPs transceivers
• APS 1+1 within module or intermodule via AMC port 12
• 4 Gigabit Ethernet connectivity to backplane (AMC.2 E2 / T2)
• Support of telecom clocks
• Integrated PowerPC Control Processor
• 2048 HDLC Controllers

TDM Integration with IP Transport
The iSPAN® 3632 Channelized I/O Processor brings a new level of integration to next-generation TDM-based systems. It offers a flexible, efficient means of transporting TDM voice traffic through Ethernet backplanes – ideal for cost-effective systems based on ATCA 3.1.

With its four optical interfaces, the 3632 supports up to 622 Mb/s aggregate transmission rates – full 8,064 DS0 time slots on a single-module AdvancedMC. In this compact package, the 3632 provides TDM processing for all time slots.

Voice and Data Link Services
The 3632 increases system efficiency by terminating HDLC data links locally, sending only the decoded frame content data for host processing. The 3632 communicates with its host system via Gigabit Ethernet, making it ideal for High-Availability systems with distributed and redundant processing elements. The 3632 supports 2,048 channels of HDLC encapsulation for embedded DS0 or subrate data links.

Flexible Programming Options
FPGAs are known for their ability to effectively handle challenging processing applications– from deep packet inspection to high intensity video codec functions. The iSPAN® 3632 I/O processor combines the raw power of a high-end FPGA with the ease of programming offered by integrated PowerPC processors. With the highly-integrated “best of both worlds” solution, development teams can combine high-performance FPGA based data plane processing with a familiar Linux control plane.